RISC-V won chip design by making the instruction set free to use.

For decades chip makers had to license an instruction set from Arm or Intel, paying fees and accepting restrictions, which made designing a processor expensive and limited who could do it. That locked most chip development to a handful of incumbents.

In 2010 Berkeley professors Krste Asanović and David Patterson, with their students, started RISC-V, a clean and modular RISC instruction set. Unlike almost every other ISA, it was released under open licences, so anyone could use it, modify it and add to it without paying or asking.

The release to the open community in 2015 let companies, universities and individuals all build on the same free base. Because the cost of entry was gone, a large ecosystem grew, and RISC-V spread into embedded devices, AI accelerators and other custom chips.

Open the ISA and give it away

No licence fee removed the biggest barrier to designing a new processor.

Open, modular extensions let a company add its own instructions, so RISC-V fit custom silicon.

A free ISA let universities and small firms participate, which grew the pool of talent and designs.

Anyone could build compatible hardware, so the ecosystem scaled the way open software does.

A hardware standard can take off the way open software did: give away the thing everyone must agree on, and let a huge ecosystem build on it.

RISC-V went from a Berkeley project to a widely used open ISA, with commercial IP vendors such as SiFive and support from large chipmakers. It has not yet displaced Arm or x86 broadly, but the open, no-royalty model made it the default choice for custom and embedded silicon.